Versions
- 2.3.4.r29.g9c5bd52
- 2.3.7 (10)
- 2.3.6 (6)
- 2.3.5
- 2.3.4 (4)
- 2.3.0
- 2.2.5
Package names
- ADMS-qucs
- adms (10)
- adms-dbginfo
- adms-git
- cad/adms (2)
- development/adms
- mot-adms (2)
Categories
- Applications/Engineering
- Applications/Scientific
- Development/Other
- Engineering
- Productivity/Scientific/Electronics
- Unspecified
- cad (2)
- debug
- development
- electronics (2)
- misc
- office.scientific
- universe/misc
Licenses
- GPL (2)
- GPL-3.0 (2)
- GPL-3.0-only (2)
- GPL-3.0-or-later (2)
- GPLv3
- GPLv3+
- LGPL
- LGPL-2.1
- LGPLv2+
Summaries
- A code generator for the Verilog-AMS language (2)
- ADMS is a code generator for the Verilog-AMS language
- ADMS is a codegenerator for the VERILOG-A(MS) language
- An automatic device model synthesizer (2)
- An electrical compact device models converter (2)
- Automatic Device Model Synthesizer (Qucs fork)
- Automatic device model synthesizer
- Compact device model code generator for SPICE
- Debug symbols for adms
- Model generator for SPICE simulators
- automatic device model synthesizer
- codegenerator for the VERILOG-A(MS) language